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181 nips-2005-Spiking Inputs to a Winner-take-all Network

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Author: Matthias Oster, Shih-Chii Liu

Abstract: Recurrent networks that perform a winner-take-all computation have been studied extensively. Although some of these studies include spiking networks, they consider only analog input rates. We present results of this winner-take-all computation on a network of integrate-and-ﬁre neurons which receives spike trains as inputs. We show how we can conﬁgure the connectivity in the network so that the winner is selected after a pre-determined number of input spikes. We discuss spiking inputs with both regular frequencies and Poisson-distributed rates. The robustness of the computation was tested by implementing the winner-take-all network on an analog VLSI array of 64 integrate-and-ﬁre neurons which have an innate variance in their operating parameters. 1

Reference: text

Summary: the most important sentenses genereted by tfidf model

sentIndex sentText sentNum sentScore

1 Although some of these studies include spiking networks, they consider only analog input rates. [sent-5, score-0.282]

2 We present results of this winner-take-all computation on a network of integrate-and-ﬁre neurons which receives spike trains as inputs. [sent-6, score-1.075]

3 We show how we can conﬁgure the connectivity in the network so that the winner is selected after a pre-determined number of input spikes. [sent-7, score-0.607]

4 The robustness of the computation was tested by implementing the winner-take-all network on an analog VLSI array of 64 integrate-and-ﬁre neurons which have an innate variance in their operating parameters. [sent-9, score-0.561]

5 Descriptions of theoretical spike-based models [Jin and Seung, 2002] and analog VLSI (aVLSI) implementations of both spike and non-spike models [Lazzaro et al. [sent-14, score-0.512]

6 Although the competition mechanism in these models uses spike signals, they usually consider the external input to the network to be either an analog input current or an analog value that represents the spike rate. [sent-17, score-1.352]

7 We describe the operation and connectivity of a winner-take-all network that receives input spikes. [sent-18, score-0.487]

8 We consider the case of the hard winner-take-all mode, where only the winning neuron is active and all other neurons are suppressed. [sent-19, score-0.808]

9 We discuss a scheme for setting the excitatory and inhibitory weights of the network so that the winner which receives input with the shortest inter-spike interval is selected after a pre-determined number of input spikes. [sent-20, score-1.089]

10 The winner can be selected with as few as two input spikes, making the selection process fast [Jin and Seung, 2002]. [sent-21, score-0.364]

11 We tested this computation on an aVLSI chip with 64 integrate-and-ﬁre neurons and various dynamic excitatory and inhibitory synapses. [sent-22, score-0.69]

12 To perform a winner-take-all operation, they are driven by excitatory neurons (unﬁlled circles) and in return, they inhibit all excitatory neurons (black arrows: excitatory connections; dark arrows: inhibitory). [sent-24, score-0.977]

13 (b) Network model in which the global inhibitory interneuron is replaced by full inhibitory connectivity of efﬁcacy VI . [sent-25, score-0.575]

14 The results shown in Section 3 of this paper were obtained with a network that has been calibrated so that the neurons have about 10% variance in their ﬁring rates in response to a common input current. [sent-28, score-0.525]

15 1 Connectivity We assume a network of integrate-and-ﬁre neurons that receive external excitatory or inhibitory spiking input. [sent-30, score-0.963]

16 In biological networks, inhibition between these array neurons is mediated by populations of global inhibitory interneurons (Fig. [sent-31, score-0.728]

17 They are driven by the excitatory neurons and inhibit them in return. [sent-33, score-0.448]

18 In our model, we assume the forward connections between the excitatory and the inhibitory neurons to be strong, so that each spike of an excitatory neuron triggers a spike in the global inhibitory neurons. [sent-34, score-2.282]

19 The strength of the total inhibition between the array neurons is adjusted by tuning the backward connections from the global inhibitory neurons to the array neurons. [sent-35, score-1.063]

20 This conﬁguration allows the fastest spreading of inhibition through the network and is consistent with ﬁndings that inhibitory interneurons tend to ﬁre at high frequencies. [sent-36, score-0.461]

21 With this conﬁguration, we can simplify the network by replacing the global inhibitory interneurons with full inhibitory connectivity between the array neurons (Fig. [sent-37, score-1.117]

22 In addition, each neuron has a self-excitatory connection that facilitates the selection of this neuron as winner for repeated input. [sent-39, score-1.103]

23 For this analysis, we assume that the neurons receive spike trains of regular frequency. [sent-41, score-0.934]

24 N then satisfy the equation of a non-leaky integrate- (a) V Vth VE th VE V self (b) VE VI VI VE Figure 2: Membrane potential of the winning neuron k (a) and another neuron in the array (b). [sent-46, score-1.091]

25 Traces show the changes in the membrane membrane potential caused by the various synaptic inputs. [sent-48, score-0.307]

26 Black dots show the times of output spikes of neuron k. [sent-49, score-0.77]

27 and-ﬁre neuron model with non-conductance-based synapses: dVi = VE dt N (n) (m) δ(t − ti ) − VI n δ(t − sj j=1 j=i ) (1) m The membrane resting potential is set to 0. [sent-50, score-0.592]

28 Each neuron receives external excitatory input and inhibitory connections from all other neurons. [sent-51, score-1.111]

29 All inputs to a neuron are spikes and its output is also transmitted as spikes to other neurons. [sent-52, score-1.144]

30 Each input spike causes a ﬁxed discontinuous jump in the membrane potential (VE for the excitatory synapse and VI for the inhibitory). [sent-54, score-0.758]

31 Each neuron i spikes when Vi ≥ Vth and is reset to Vi = 0. [sent-55, score-0.773]

32 All potentials satisfy 0 ≤ Vi ≤ Vth , that is, an inhibitory spike can not drive the membrane potential below ground. [sent-57, score-0.766]

33 N, i=k receive excitatory input spike trains of constant frequency ri . [sent-61, score-0.92]

34 Neuron k receives the highest input frequency (rk > ri ∀ i=k). [sent-62, score-0.348]

35 As soon as neuron k spikes once, it has won the computation. [sent-63, score-0.731]

36 Depending on the initial conditions, other neurons can at most have transient spikes before the ﬁrst spike of neuron k. [sent-64, score-1.407]

37 2): (a) Neuron k (the winning neuron) spikes after receiving nk = n input spikes that cause its membrane potential to exceed threshold. [sent-66, score-1.056]

38 After every spike, the neuron is reset to Vself : Vself + nk VE ≥ Vth (2) (b) As soon as neuron k spikes once, no other neuron i = k can spike because it receives an inhibitory spike from neuron k. [sent-67, score-3.348]

39 Another neuron can receive up to n spikes even if its input spike frequency is lower than that of neuron k because the neuron is reset to Vself after a spike, as illustrated in Figure 2. [sent-68, score-2.312]

40 The resulting membrane voltage has to be smaller than before: ni · V E ≤ nk · V E ≤ V I (3) (c) If a neuron j other than neuron k spikes in the beginning, there will be some time in the future when neuron k spikes and becomes the winning neuron. [sent-69, score-2.205]

41 From then on, the conditions (a) and (b) hold, so a neuron j = k can at most have a few transient spikes. [sent-70, score-0.437]

42 Let us assume that neurons j and k spike with almost the same frequency (but rk > rj ). [sent-71, score-0.755]

43 Since the spike trains are not synchronized, an input spike to neuron k has a changing phase offset φ from an input spike of neuron j. [sent-73, score-2.422]

44 At every output spike of neuron j, this phase decreases by ∆φ = nk (∆j −∆k ) until φ < nk (∆j −∆k ). [sent-74, score-1.105]

45 When this happens, neuron k receives (nk +1) input spikes before neuron j spikes again and crosses threshold: (nk + 1) · VE ≥ Vth (4) We can choose Vself = VE and VI = Vth to fulﬁll the inequalities (2)-(4). [sent-75, score-1.746]

46 Case (c) happens only under certain initial conditions, for example when Vk Vj or when neuron j initially received a spike train of higher frequency than neuron k. [sent-77, score-1.392]

47 The network will then select the winning neuron after receiving a pre-determined number of input spikes and this winner will have the ﬁrst output spike. [sent-79, score-1.393]

48 1 Poisson-Distributed Inputs In the case of Poisson-distributed spiking inputs, there is a probability associated with the correct winner being selected. [sent-81, score-0.35]

49 This probability depends on the Poisson rate ν and the number of spikes needed for the neuron to reach threshold n. [sent-82, score-0.755]

50 The probability that m input spikes arrive at a neuron in the period T is given by the Poisson distribution P(m, νT ) = e−νT (νT )m m! [sent-83, score-0.842]

51 (5) We assume that all neurons i receive an input rate νi , except the winning neuron which receives a higher rate νk . [sent-84, score-1.128]

52 The network will make a correct decision at time T , if the winner crosses threshold exactly then with its nth input spike, while all other neuron received less than n spikes until then. [sent-86, score-1.369]

53 The winner receives the nth input spike at T , if it received n−1 input spikes in [0; T [ and one at time T . [sent-87, score-1.345]

54 For n = 1 every input spike elicits an output spike. [sent-89, score-0.549]

55 The probability of a having an output spike from neuron k is then directly dependent on the input rates, since no computation in the network takes place. [sent-90, score-1.123]

56 For n → ∞, the integration times to determine the rates of the Poisson-distributed input spike trains are large, and the neurons perform a good estimation of the input rate. [sent-91, score-1.027]

57 The network can then discriminate small changes in the input frequencies. [sent-92, score-0.273]

58 This gain in precision leads a slow response time of the network, since a large number of input spike is integrated before an output spike of the network. [sent-93, score-0.948]

59 The winner-take-all architecture can also be used with a latency spike code. [sent-94, score-0.399]

60 In this case, the delay of the input spikes after a global reset determines the strength of the signal. [sent-95, score-0.507]

61 The winner is selected after the ﬁrst input spike to the network (nk = 1). [sent-96, score-0.9]

62 If all neurons are discharged at the onset of the stimulus, the network does not require the global reset. [sent-97, score-0.508]

63 3 Results We implemented this architecture on a chip with 64 integrate-and-ﬁre neurons implemented in analog VLSI technology. [sent-99, score-0.425]

64 These neurons follow the model equation 1, except that they also show a small linear leakage. [sent-100, score-0.277]

65 Spikes from the neurons are communicated off-chip using an asynchronous event representation transmission protocol (AER). [sent-101, score-0.277]

66 When a neuron spikes, the chip outputs the address of this neuron (or spike) onto a common digital bus (see Figure 3). [sent-102, score-1.017]

67 An external spike interface module (consisting of a custom computer board that can be programmed through the PCI bus) receives the incoming spikes from the chip, and retransmits spikes back to the chip using information stored in a routing table. [sent-103, score-1.314]

68 This module can also monitor spike trains from the chip and send spikes from a stored list. [sent-104, score-0.974]

69 Through this module and the AER protocol, we implement the connectivity needed for the winnertake-all network in Figure 1. [sent-105, score-0.299]

70 neuron array spike interface module monitor reroute sequence Figure 3: The connections are implemented by transmitting spikes over a common bus (grey arrows). [sent-108, score-1.407]

71 Spikes from aVLSI neurons in the network are recorded by the digital interface and can be monitored and rerouted to any neuron in the array. [sent-109, score-0.912]

72 Additionally, externally generated spike trains can be transmitted to the array through the sequencer. [sent-110, score-0.626]

73 Figure 4 illustrates the network behaviour with a spike raster plot. [sent-112, score-0.568]

74 At time t = 0, the neurons receive inputs with the same regular ﬁring frequency of 100Hz except for one neuron which received a higher input frequency of 120Hz. [sent-113, score-1.202]

75 The synaptic efﬁcacies were tuned so that threshold is reached with 6 input spikes, after which the network does select the neuron with the strongest input as the winner. [sent-114, score-0.972]

76 Neuron number 42 receives an input spike train with an increased frequency of 120Hz. [sent-116, score-0.722]

77 (b) Output without WTA connectivity: after an adjustable number of input spikes, the neurons start to ﬁre with a regular output frequency. [sent-117, score-0.48]

78 The output frequencies of the neurons are slightly different due to mismatch in the synaptic efﬁcacies. [sent-118, score-0.49]

79 Neuron 42 has the highest output frequency since it receives the strongest input. [sent-119, score-0.314]

80 (c) Output with WTA connectivity: only neuron 42 with the strongest input ﬁres, all other neurons are suppressed. [sent-120, score-0.863]

81 measuring to which minimal frequency, compared to the other input, the input rate to this neuron has to be raised to select it as the winner. [sent-121, score-0.574]

82 The neuron being tested receives an input of regular frequency of f · 100Hz, while all other neuron receive 100Hz. [sent-122, score-1.326]

83 The histogram of the minimum factors f for all neurons is shown in Figure 5. [sent-123, score-0.277]

84 On average, the network can discriminate a difference in the input frequency of 10%. [sent-124, score-0.352]

85 Since only the timing information of the spike trains is used, the results can be extended to a wide range of input frequencies different from 100Hz. [sent-127, score-0.676]

86 To test the performance of the network with Poisson inputs, we stimulated all neurons with Poisson-distibuted spike rates of rate ν, except neuron k which received the rate νk = f ν. [sent-128, score-1.317]

87 8 then simpliﬁes to ∞ f ν P(n−1, f ν T ) · P = 0 N−1 n−1 P (i, νT ) dT (9) i=0 We show measured data and theoretical predictions for a winner-take-all network of 2 and 8 neurons (Fig. [sent-130, score-0.414]

88 Obviously, the discrimation performance of the network is substantially limited by the Poisson nature of the spike trains compared to spike trains of regular frequency. [sent-132, score-1.246]

89 2 Figure 5: Discrimination capability of the winner-take-all network: X-axis: factor f to which the input frequency of a neuron has to be increased, compared to the input rate of the other neurons, in order for that neuron to be selected as the winner. [sent-137, score-1.223]

90 5) 8 Figure 6: Probability of a correct decision of the winner-take-all network, versus difference in frequencies (left), and number of input spikes n for a neuron to reach threshold (right). [sent-152, score-0.932]

91 The measured data (crosses/circles) is shown with the prediction of the model (continuous lines), for a winner-take-all network of 2 neurons (red,circles) and 8 neurons (blue, crosses). [sent-153, score-0.691]

92 4 Conclusion We analysed the performance and behavior of a winner-take-all spiking network that receives input spike trains. [sent-154, score-0.872]

93 The neuron that receives spikes with the highest rate is selected as the winner after a pre-determined number of input spikes. [sent-155, score-1.253]

94 Assuming a non-leaky integrate-and-ﬁre model neuron with constant synaptic weights, we derived constraints for the strength of the inhibitory connections and the self-excitatory connection of the neuron. [sent-156, score-0.819]

95 A large inhibitory synaptic weight is in agreement with previous analysis for analog inputs [Jin and Seung, 2002]. [sent-157, score-0.435]

96 The ability of a single spike from the inhibitory neuron to inhibit all neurons removes constraints on the matching of the time constants and efﬁcacy of the connections from the excitatory neurons to the inhibitory neuron and vice versa. [sent-158, score-2.483]

97 We also studied whether the network is able to select the winner in the case of input spike trains which have a Poisson distribution. [sent-160, score-1.031]

98 Because of the Poisson distributed inputs, the network does not always chose the right winner (that is, the neuron with the highest input frequency) but there is a certain probability that the network does select the right winner. [sent-161, score-1.102]

99 We are currently extending our analysis to a leaky integrate-and-ﬁre neuron model and conductance-based synapses, which results in a more complex description of the network. [sent-163, score-0.464]

100 Fast computation with spikes in a recurrent neural network. [sent-203, score-0.326]

similar papers computed by tfidf model

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The central component in the system is the CPLD. The CPLD handles AER trafﬁc, mediates communication between devices, and implements recurrent connections by accessing a lookup table, stored in the RAM chip. The USB interface chip provides a bidirectional link with a PC. The DACs control the analog biases in the system, including the leak current, which the PC varies in real-time to create the global inhibitory theta rhythm. The principal neuron consists of a refractory period and calcium-dependent potassium circuit (RCK), a synapse circuit, and a soma circuit (Figure 2A). RCK and the synapse are ISOMA Soma Synapse STDP Presyn. Spike PE LPF A Presyn. Spike Raster AH 0 0.1 Spike probability RCK Postsyn. Spike B 0.05 0.1 0.05 0.1 0.08 0.06 0.04 0.02 0 0 Time(s) Figure 2: Principal neuron. A A simpliﬁed schematic is shown, including: the synapse, refractory and calcium-dependent potassium channel (RCK), soma, and axon-hillock (AH) circuits, plus their constituent elements, the pulse extender (PE) and the low-pass ﬁlter (LPF). B Spikes (dots) from 81 principal neurons are temporally dispersed, when excited by poisson-like inputs (58Hz) and inhibited by the common 8.3Hz theta rhythm (solid line). The histogram includes spikes from ﬁve theta cycles. composed of two reusable blocks: the low-pass ﬁlter (LPF) and the pulse extender (PE). The soma is a modiﬁed version of the LPF, which receives additional input from an axonhillock circuit (AH). RCK is inhibitory to the neuron. It consists of a PE, which models calcium inﬂux during a spike, and a LPF, which models calcium buffering. When AH ﬁres a spike, a packet of charge is dumped onto a capacitor in the PE. The PE’s output activates until the charge decays away, which takes a few milliseconds. Also, while the PE is active, charge accumulates on the LPF’s capacitor, lowering the LPF’s output voltage. Once the PE deactivates, this charge leaks away as well, but this takes tens of milliseconds because the leak is smaller. The PE’s and the LPF’s inhibitory effects on the soma are both described below in terms of the sum (ISHUNT ) of the currents their output voltages produce in pMOS transistors whose sources are at Vdd (see Figure 2A). Note that, in the absence of spikes, these currents decay exponentially, with a time-constant determined by their respective leaks. The synapse circuit is excitatory to the neuron. It is composed of a PE, which represents the neurotransmitter released into the synaptic cleft, and a LPF, which represents the bound neurotransmitter. The synapse circuit is similar to RCK in structure but differs in function: It is activated not by the principal neuron itself but by the STDP circuits (or directly by afferent spikes that bypass these circuits, i.e., ﬁxed synapses). The synapse’s effect on the soma is also described below in terms of the current (ISYN ) its output voltage produces in a pMOS transistor whose source is at Vdd. The soma circuit is a leaky integrator. It receives excitation from the synapse circuit and shunting inhibition from RCK and has a leak current as well. Its temporal behavior is described by: τ dISOMA ISYN I0 + ISOMA = dt ISHUNT where ISOMA is the current the capacitor’s voltage produces in a pMOS transistor whose source is at Vdd (see Figure 2A). ISHUNT is the sum of the leak, refractory, and calciumdependent potassium currents. These currents also determine the time constant: τ = C Ut κISHUNT , where I0 and κ are transistor parameters and Ut is the thermal voltage. STDP circuit ~LTP SRAM Presynaptic spike A ~LTD Inverse number of pairings Integrator Decay Postsynaptic spike Potentiation 0.1 0.05 0 0.05 0.1 Depression -80 -40 0 Presynaptic spike Postsynaptic spike 40 Spike timing: t pre - t post (ms) 80 B Figure 3: STDP circuit design and characterization. A The circuit is composed of three subcircuits: decay, integrator, and SRAM. B The circuit potentiates when the presynaptic spike precedes the postsynaptic spike and depresses when the postsynaptic spike precedes the presynaptic spike. The soma circuit is connected to an AH, the locus of spike generation. The AH consists of model voltage-dependent sodium and potassium channel populations (modiﬁed from [6] by Kai Hynna). It initiates the AER signaling process required to send a spike off chip. To characterize principal neuron variability, we excited 81 neurons with poisson-like 58Hz spike trains (Figure 2B). We made these spike trains poisson-like by starting with a regular 200Hz spike train and dropping spikes randomly, with probability of 0.71. Thus spikes were delivered to neurons that won the coin toss in synchrony every 5ms. However, neurons did not lock onto the input synchrony due to ﬁltering by the synaptic time constant (see Figure 2B). They also received a common inhibitory input at the theta frequency (8.3Hz), via their leak current. Each neuron was prevented from ﬁring more than one spike in a theta cycle by its model calcium-dependent potassium channel population. The principal neurons’ spike times were variable. To quantify the spike variability, we used timing precision, which we deﬁne as twice the standard deviation of spike times accumulated from ﬁve theta cycles. With an input rate of 58Hz the timing precision was 34ms. 3 STDP Circuit The STDP circuit (related to [7]-[8]), for which the STDP Chip is named, is the most abundant, with 21,504 copies on the chip. This circuit is built from three subcircuits: decay, integrator, and SRAM (Figure 3A). The decay and integrator are used to implement potentiation, and depression, in a symmetric fashion. The SRAM holds the current binary state of the synapse, either potentiated or depressed. For potentiation, the decay remembers the last presynaptic spike. Its capacitor is charged when that spike occurs and discharges linearly thereafter. A postsynaptic spike samples the charge remaining on the capacitor, passes it through an exponential function, and dumps the resultant charge into the integrator. This charge decays linearly thereafter. At the time of the postsynaptic spike, the SRAM, a cross-coupled inverter pair, reads the voltage on the integrator’s capacitor. If it exceeds a threshold, the SRAM switches state from depressed to potentiated (∼LTD goes high and ∼LTP goes low). The depression side of the STDP circuit is exactly symmetric, except that it responds to postsynaptic activation followed by presynaptic activation and switches the SRAM’s state from potentiated to depressed (∼LTP goes high and ∼LTD goes low). When the SRAM is in the potentiated state, the presynaptic 50 After STDP 83 92 100 Timing precision(ms) Before STDP 75 B Before STDP After STDP 40 30 20 10 0 50 60 70 80 90 Input rate(Hz) 100 50 58 67 text A 0.2 0.4 Time(s) 0.6 0.2 0.4 Time(s) 0.6 C Figure 4: Plasticity enhanced phase-coding. A Spike rasters of 81 neurons (9 by 9 cluster) display synchrony over a two-fold range of input rates after STDP. B The degree of enhancement is quantiﬁed by timing precision. C Each neuron (center box) sends synapses to (dark gray) and receives synapses from (light gray) twenty-one randomly chosen neighbors up to ﬁve nodes away (black indicates both connections). spike activates the principal neuron’s synapse; otherwise the spike has no effect. We characterized the STDP circuit by activating a plastic synapse and a ﬁxed synapse– which elicits a spike at different relative times. We repeated this pairing at 16Hz. We counted the number of pairings required to potentiate (or depress) the synapse. Based on this count, we calculated the efﬁcacy of each pairing as the inverse number of pairings required (Figure 3B). For example, if twenty pairings were required to potentiate the synapse, the efﬁcacy of that pre-before-post time-interval was one twentieth. The efﬁcacy of both potentiation and depression are ﬁt by exponentials with time constants of 11.4ms and 94.9ms, respectively. This behavior is similar to that observed in the hippocampus: potentiation has a shorter time constant and higher maximum efﬁcacy than depression [3]. 4 Recurrent Network We carried out an experiment designed to test the STDP circuit’s ability to compensate for variability in spike timing through PEP. Each neuron received recurrent connections from 21 randomly selected neurons within an 11 by 11 neighborhood centered on itself (see Figure 4C). Conversely, it made recurrent connections to randomly chosen neurons within the same neighborhood. These connections were mediated by STDP circuits, initialized to the depressed state. We chose a 9 by 9 cluster of neurons and delivered spikes at a mean rate of 50 to 100Hz to each one (dropping spikes with a probability of 0.75 to 0.5 from a regular 200Hz train) and provided common theta inhibition as before. We compared the variability in spike timing after ﬁve seconds of learning with the initial distribution. Phase coding was enhanced after STDP (Figure 4A). Before STDP, spike timing among neurons was highly variable (except for the very highest input rate). After STDP, variability was virtually eliminated (except for the very lowest input rate). Initially, the variability, characterized by timing precision, was inversely related to the input rate, decreasing from 34 to 13ms. After ﬁve seconds of STDP, variability decreased and was largely independent of input rate, remaining below 11ms. Potentiated synapses 25 A Synaptic state after STDP 20 15 10 5 0 B 50 100 150 200 Spiking order 250 Figure 5: Compensating for variability. A Some synapses (dots) become potentiated (light) while others remain depressed (dark) after STDP. B The number of potentiated synapses neurons make (pluses) and receive (circles) is negatively (r = -0.71) and positively (r = 0.76) correlated to their rank in the spiking order, respectively. Comparing the number of potentiated synapses each neuron made or received with its excitability conﬁrmed the PEP hypothesis (i.e., leading neurons provide additional synaptic current to lagging neurons via potentiated recurrent synapses). In this experiment, to eliminate variability due to noise (as opposed to excitability), we provided a 17 by 17 cluster of neurons with a regular 200Hz excitatory input. Theta inhibition was present as before and all synapses were initialized to the depressed state. After 10 seconds of STDP, a large fraction of the synapses were potentiated (Figure 5A). When the number of potentiated synapses each neuron made or received was plotted versus its rank in spiking order (Figure 5B), a clear correlation emerged (r = -0.71 or 0.76, respectively). As expected, neurons that spiked early made more and received fewer potentiated synapses. In contrast, neurons that spiked late made fewer and received more potentiated synapses. 5 Pattern Completion After STDP, we found that the network could recall an entire pattern given a subset, thus the same mechanisms that compensated for variability and noise could also compensate for lack of information. We chose a 9 by 9 cluster of neurons as our pattern and delivered a poisson-like spike train with mean rate of 67Hz to each one as in the ﬁrst experiment. Theta inhibition was present as before and all synapses were initialized to the depressed state. Before STDP, we stimulated a subset of the pattern and only neurons in that subset spiked (Figure 6A). After ﬁve seconds of STDP, we stimulated the same subset again. This time they recruited spikes from other neurons in the pattern, completing it (Figure 6B). Upon varying the fraction of the pattern presented, we found that the fraction recalled increased faster than the fraction presented. We selected subsets of the original pattern randomly, varying the fraction of neurons chosen from 0.1 to 1.0 (ten trials for each). We classiﬁed neurons as active if they spiked in the two second period over which we recorded. Thus, we characterized PEP’s pattern-recall performance as a function of the probability that the pattern in question’s neurons are activated (Figure 6C). At a fraction of 0.50 presented, nearly all of the neurons in the pattern are consistently activated (0.91±0.06), showing robust pattern completion. We ﬁtted the recall performance with a sigmoid that reached 0.50 recall fraction with an input fraction of 0.30. No spurious neurons were activated during any trials. Rate(Hz) Rate(Hz) 8 7 7 6 6 5 5 0.6 0.4 2 0.2 0 0 3 3 2 1 1 A 0.8 4 4 Network activity before STDP 1 Fraction of pattern actived 8 0 B Network activity after STDP C 0 0.2 0.4 0.6 0.8 Fraction of pattern stimulated 1 Figure 6: Associative recall. A Before STDP, half of the neurons in a pattern are stimulated; only they are activated. B After STDP, half of the neurons in a pattern are stimulated, and all are activated. C The fraction of the pattern activated grows faster than the fraction stimulated. 6 Discussion Our results demonstrate that PEP successfully compensates for graded variations in our silicon recurrent network using binary (on–off) synapses (in contrast with [8], where weights are graded). While our chip results are encouraging, variability was not eliminated in every case. In the case of the lowest input (50Hz), we see virtually no change (Figure 4A). We suspect the timing remains imprecise because, with such low input, neurons do not spike every theta cycle and, consequently, provide fewer opportunities for the STDP synapses to potentiate. This shortfall illustrates the system’s limits; it can only compensate for variability within certain bounds, and only for activity appropriate to the PEP model. As expected, STDP is the mechanism responsible for PEP. STDP potentiated recurrent synapses from leading neurons to lagging neurons, reducing the disparity among the diverse population of neurons. Even though the STDP circuits are themselves variable, with different efﬁcacies and time constants, when using timing the sign of the weight-change is always correct (data not shown). For this reason, we chose STDP over other more physiological implementations of plasticity, such as membrane-voltage-dependent plasticity (MVDP), which has the capability to learn with graded voltage signals [9], such as those found in active dendrites, providing more computational power [10]. Previously, we investigated a MVDP circuit, which modeled a voltage-dependent NMDAreceptor-gated synapse [11]. It potentiated when the calcium current analog exceeded a threshold, which was designed to occur only during a dendritic action potential. This circuit produced behavior similar to STDP, implying it could be used in PEP. However, it was sensitive to variability in the NMDA and potentiation thresholds, causing a fraction of the population to potentiate anytime the synapse received an input and another fraction to never potentiate, rendering both subpopulations useless. Therefore, the simpler, less biophysical STDP circuit won out over the MVDP circuit: In our system timing is everything. Associative storage and recall naturally emerge in the PEP network when synapses between neurons coactivated by a pattern are potentiated. These synapses allow neurons to recruit their peers when a subset of the pattern is presented, thereby completing the pattern. However, this form of pattern storage and completion differs from Hopﬁeld’s attractor model [12] . Rather than forming symmetric, recurrent neuronal circuits, our recurrent network forms asymmetric circuits in which neurons make connections exclusively to less excitable neurons in the pattern. In both the poisson-like and regular cases (Figures 4 & 5), only about six percent of potentiated connections were reciprocated, as expected by chance. We plan to investigate the storage capacity of this asymmetric form of associative memory. Our system lends itself to modeling brain regions that use precise spike timing, such as the hippocampus. We plan to extend the work presented to store and recall sequences of patterns, as the hippocampus is hypothesized to do. Place cells that represent different locations spike at different phases of the theta cycle, in relation to the distance to their preferred locations. This sequential spiking will allow us to link patterns representing different locations in the order those locations are visited, thereby realizing episodic memory. We propose PEP as a candidate neural mechanism for information coding and storage in the hippocampal system. Observations from the CA1 region of the hippocampus suggest that basal dendrites (which primarily receive excitation from recurrent connections) support submillisecond timing precision, consistent with PEP [13]. We have shown, in a silicon model, PEP’s ability to exploit such fast recurrent connections to sharpen timing precision as well as to associatively store and recall patterns. Acknowledgments We thank Joe Lin for assistance with chip generation. The Ofﬁce of Naval Research funded this work (Award No. N000140210468). References [1] O’Keefe J. & Recce M.L. (1993). Phase relationship between hippocampal place units and the EEG theta rhythm. Hippocampus 3(3):317-330. [2] Mehta M.R., Lee A.K. & Wilson M.A. (2002) Role of experience and oscillations in transforming a rate code into a temporal code. Nature 417(6890):741-746. [3] Bi G.Q. & Wang H.X. (2002) Temporal asymmetry in spike timing-dependent synaptic plasticity. Physiology & Behavior 77:551-555. [4] Rodriguez-Vazquez, A., Linan, G., Espejo S. & Dominguez-Castro R. (2003) Mismatch-induced trade-offs and scalability of analog preprocessing visual microprocessor chips. Analog Integrated Circuits and Signal Processing 37:73-83. [5] Boahen K.A. (2000) Point-to-point connectivity between neuromorphic chips using address events. IEEE Transactions on Circuits and Systems II 47:416-434. [6] Culurciello E.R., Etienne-Cummings R. & Boahen K.A. (2003) A biomorphic digital image sensor. IEEE Journal of Solid State Circuits 38:281-294. [7] Boﬁll A., Murray A.F & Thompson D.P. (2005) Citcuits for VLSI Implementation of Temporally Asymmetric Hebbian Learning. In: Advances in Neural Information Processing Systems 14, MIT Press, 2002. [8] Cameron K., Boonsobhak V., Murray A. & Renshaw D. (2005) Spike timing dependent plasticity (STDP) can ameliorate process variations in neuromorphic VLSI. IEEE Transactions on Neural Networks 16(6):1626-1627. [9] Chicca E., Badoni D., Dante V., D’Andreagiovanni M., Salina G., Carota L., Fusi S. & Del Giudice P. (2003) A VLSI recurrent network of integrate-and-ﬁre neurons connected by plastic synapses with long-term memory. IEEE Transaction on Neural Networks 14(5):1297-1307. [10] Poirazi P., & Mel B.W. (2001) Impact of active dendrites and structural plasticity on the memory capacity of neural tissue. Neuron 29(3)779-796. [11] Arthur J.V. & Boahen K. (2004) Recurrently connected silicon neurons with active dendrites for one-shot learning. In: IEEE International Joint Conference on Neural Networks 3, pp.1699-1704. [12] Hopﬁeld J.J. (1984) Neurons with graded response have collective computational properties like those of two-state neurons. Proceedings of the National Academy of Science 81(10):3088-3092. [13] Ariav G., Polsky A. & Schiller J. (2003) Submillisecond precision of the input-output transformation function mediated by fast sodium dendritic spikes in basal dendrites of CA1 pyramidal neurons. Journal of Neuroscience 23(21):7750-7758.

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