nips nips2000 nips2000-118 knowledge-graph by maker-knowledge-mining
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Author: Hiroyuki Kurino, M. Nakagawa, Kang Wook Lee, Tomonori Nakamura, Yuusuke Yamada, Ki Tae Park, Mitsumasa Koyanagi
Abstract: The smart VISIOn chip has a large potential for application in general purpose high speed image processing systems . In order to fabricate smart vision chips including photo detector compactly, we have proposed the application of three dimensional LSI technology for smart vision chips. Three dimensional technology has great potential to realize new neuromorphic systems inspired by not only the biological function but also the biological structure. In this paper, we describe our three dimensional LSI technology for neuromorphic circuits and the design of smart vision chips .
Reference: text
sentIndex sentText sentNum sentScore
1 jp Abstract The smart VISIOn chip has a large potential for application in general purpose high speed image processing systems . [sent-15, score-1.053]
2 In order to fabricate smart vision chips including photo detector compactly, we have proposed the application of three dimensional LSI technology for smart vision chips. [sent-16, score-2.749]
3 Three dimensional technology has great potential to realize new neuromorphic systems inspired by not only the biological function but also the biological structure. [sent-17, score-0.942]
4 In this paper, we describe our three dimensional LSI technology for neuromorphic circuits and the design of smart vision chips . [sent-18, score-1.941]
5 1 Introduction Recently, the demand for very fast image processing systems with real time operation capability has significantly increased. [sent-19, score-0.239]
6 Conventional image processing systems based on the system level integration of a camera and a digital processor, do not have the potential for application in general purpose consumer electronic products . [sent-20, score-0.486]
7 This is simply due to the cost, size and complexity of these systems . [sent-21, score-0.042]
8 Therefore the smart vision chip will be an inevitable component of future intelligent systems . [sent-22, score-1.054]
9 In smart vision chips, 2D images are simultaneously processed in parallel. [sent-23, score-0.877]
10 Therefore very high speed image processing can be realized. [sent-24, score-0.193]
11 In order to receive a light signal as much as possible, the photo-detector should occupy a large proportion of the pixel area. [sent-26, score-0.214]
12 However the successi ve processing circuits must become larger in each pixel to realize high level image processing. [sent-27, score-0.635]
13 It is very difficult to achieve smart vision chips by using conventional two dimensional (2D) LSI technology because such smart vision chips have low fill-factor and low resolution. [sent-28, score-2.509]
14 This problem can be overcome if three dimensional (3D) integration technology can be employed for the smart vision chip. [sent-29, score-1.375]
15 In this paper, we propose a smart vision chip fabricated by three dimensional integration technology. [sent-30, score-1.512]
16 We also discuss the key technologies for realizing three dimensional integration and preliminary test results of three dimensional image sensor chips. [sent-31, score-1.044]
17 2 Three Dimensional Integrated Vision Chips Figure 1 shows the cross-sectional structure of the three dimensional integrated vision chip. [sent-32, score-0.675]
18 Several circuit layers with different functions are stacked into one chip in 3D LSI. [sent-33, score-0.47]
19 For example, the first layer consists of a photo detector array acting like photo receptive cells in the retina, the second layer is horizontal/bipolar cell circuits, the third layer is ganglion cell circuits and so on. [sent-34, score-1.832]
20 Each circuit layer is stacked and electrically connected vertically using buried interconnections and micro bumps. [sent-35, score-0.619]
21 By using three dimensional integration technology, a photo detector can be formed with a high fill-factor and high resolution, because several successive processing circuits with large areas are formed on the lower layers underneath the photo detector layer. [sent-36, score-1.789]
22 Every photo detector is directly connected with successive processing circuits (ie . [sent-37, score-0.76]
23 horizontal and bipolar cell circuits) in parallel via the vertical interconnections. [sent-38, score-0.291]
24 The signals in every pixel are simultaneously transferred in the vertical direction and processed in parallel in each layer. [sent-39, score-0.446]
25 Therefore high performance real time vision chips can be realized. [sent-40, score-0.584]
26 We considered the 3D LSI suitable for realizing neuromorphic LSI, because the three dimensional structure is quite similar to the structure of the retina or cortex. [sent-41, score-0.726]
27 Three dimensional technology will realize new neuromorphic systems inspired by not only the biological function but also the biological structure. [sent-42, score-0.872]
28 Figure 2 shows the neuromorphic analog circuits implemented into 3D LSI. [sent-45, score-0.493]
29 Photodiodes and photocircuits are designed on the first layer. [sent-47, score-0.096]
30 ~ Circuit diagram of three dimensional vision chip. [sent-98, score-0.624]
31 on different Si wafers and stacked into a 3D LSI. [sent-101, score-0.144]
32 Light signals are converted into electrical analog signals by photodiodes and photocircuits on the first layer. [sent-102, score-0.424]
33 The electric signals are transferred from the first layer to the second layer through the vertical interconnections. [sent-103, score-0.569]
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