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129 nips-2003-Minimising Contrastive Divergence in Noisy, Mixed-mode VLSI Neurons

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Author: Hsin Chen, Patrice Fleury, Alan F. Murray

Abstract: This paper presents VLSI circuits with continuous-valued probabilistic behaviour realized by injecting noise into each computing unit(neuron). Interconnecting the noisy neurons forms a Continuous Restricted Boltzmann Machine (CRBM), which has shown promising performance in modelling and classifying noisy biomedical data. The Minimising-Contrastive-Divergence learning algorithm for CRBM is also implemented in mixed-mode VLSI, to adapt the noisy neurons’ parameters on-chip. 1

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Summary: the most important sentenses genereted by tfidf model

sentIndex sentText sentNum sentScore

1 uk Abstract This paper presents VLSI circuits with continuous-valued probabilistic behaviour realized by injecting noise into each computing unit(neuron). [sent-6, score-0.155]

2 Interconnecting the noisy neurons forms a Continuous Restricted Boltzmann Machine (CRBM), which has shown promising performance in modelling and classifying noisy biomedical data. [sent-7, score-0.345]

3 The Minimising-Contrastive-Divergence learning algorithm for CRBM is also implemented in mixed-mode VLSI, to adapt the noisy neurons’ parameters on-chip. [sent-8, score-0.128]

4 1 Introduction As interests in interfacing electronic circuits to biological cells grows, an intelligent embedded system able to classify noisy and drifting biomedical signals becomes important to extract useful information at the bio-electrical interface. [sent-9, score-0.294]

5 To date, probabilistic computation has been unable to deal with the continuous-valued nature of biomedical data, while remaining amenable to hardware implementation. [sent-11, score-0.062]

6 The Continuous Restricted Boltzmann Machine(CRBM) has been shown to be promising in the modelling of noisy and drifting biomedical data[1][2], with a simple Minimising-Contrastive-Divergence(MCD) learning algorithm[1][3]. [sent-12, score-0.223]

7 The CRBM consists of continuous-valued stochastic neurons that adapt their “internal noise” to code the variation of continuous-valued data, dramatically enriching the CRBM’s representational power. [sent-13, score-0.097]

8 Following a brief introduction of the CRBM, the VLSI implementation of the noisy neuron and the MCD learning rule are presented. [sent-14, score-0.241]

9 2 Continuous Restricted Boltzmann Machine Let si represent the state of neuron i, and wij the connection between neuron i and neuron j. [sent-15, score-0.618]

10 Parameter aj is the “noise-control factor”, controlling the neuron’s output nonlinearity such that a neuron j can learn to become near-deterministic (small aj ), continuousstochastic (moderate aj ), or binary-stochastic (large aj )[4][1]. [sent-17, score-0.981]

11 A CRBM consists of one visible and one hidden layer of noisy neurons with interlayer connections deﬁned by a weight matrix {W}. [sent-18, score-0.231]

12 ηw and ηa denote the learning rates for parameters {wij } and {aj }, respectively. [sent-20, score-0.035]

13 ∆wij = ηw sign ˆ s i sj 4 ∆aj = ηa sign ˆ s2 j − sj 2 ˆ 4 − s i sj ˆˆ 4 4 (5) (6) Note that the denominator 1/a2 in Eq. [sent-23, score-0.732]

14 To validate the simpliﬁcation above, a CRBM with 2 visible neurons and 4 hidden neurons was trained to model the two-dimensional data distribution deﬁned by 20 training data (Fig. [sent-25, score-0.235]

15 5, ηa = 15 for visible neurons, and ηa = 1 for hidden neurons 1 . [sent-27, score-0.138]

16 6µm 2P3M CMOS process, which allows a power supply voltage of ﬁve volts. [sent-32, score-0.109]

17 Therefore, the states of neurons {s i } and the corresponding weights {wij } are designed to be represented by voltage in [1. [sent-33, score-0.206]

18 As both si and wij are real numbers, a four-quadrant multiplier is required to calculate wij si 3. [sent-37, score-0.665]

19 1 Four-quadrant multiplier While the Chible four-quadrant multiplier [6] has a simple architecture with a wide input range, the reference zero of one of its inputs is process-dependent. [sent-38, score-0.262]

20 Though only relative values of weights matter for the neurons, the process-dependent reference becomes nontrivial if the same four-quadrant multiplier is used to implement the MCD learning rule. [sent-39, score-0.19]

21 2, to allow external control of reference zeros of both inputs. [sent-41, score-0.048]

22 Each computing cell contains two diﬀerential pairs biased by two complementary branches, Mn1-Mn2 and Mp1-Mp2. [sent-42, score-0.072]

23 (Io1 −Io2 ) is thus proportional to (Vw −Vth,n1 − nVth,n2 )(Vsi − Vsr ) when Vw > (Vth,n1 + nVth,n2 ) 2 , and (Io3 − Io4 ) proportional to (n2 V dd − Vw − Vth,p1 − nVth,p2 )(Vsr − Vsi ) when Vw < (n2 V dd − Vth,p1 − nVth,p2 )[6]. [sent-43, score-0.084]

24 Subject to careful design of the complementary biasing transistors[6], (Vth,n1 + nVth,n2 ) ≈ (n2 V dd − Vth,p1 − nVth,p2 ) ≈ V dd/2. [sent-44, score-0.042]

25 Combining the two diﬀerential currents then gives Io = (Io1 + Io3 ) − (Io2 + Io4 ) = I(Vw ) · (Vsi − Vsr ) (7) With wi input to one computing cell and wr to the other cell, as shown in Fig. [sent-45, score-0.18]

26 2b, M1-M6 generates an output current Iout ∝ (wi − wr )(si − sr ). [sent-46, score-0.086]

27 The measured DC characteristic from a fabricated chip is shown in Fig. [sent-47, score-0.119]

28 The four-quadrant multipliers output a total current proportional to i wij si , while the diﬀerential pair, Mna and 2 n is the slope factor of MOS transistor, and Vth,x refers to the absolute value of transistor Mx’s threshold voltage. [sent-51, score-0.351]

29 The current-to-voltage converter, composed of an operational ampliﬁer and an voltage-controlled active resistor[7], then sums all currents, outputting a voltage Vx = Vsr − isum · R(Vaj ) to the sigmoid function. [sent-54, score-0.252]

30 The resistor RL ﬁnally converts io into a output voltage vo = io RL + Vsr . [sent-56, score-0.44]

31 (8) implies that Vaj controls the feedback resistance of the I-V converter, and consequently adapts the nonlinearity of the sigmoid function (which appears as aj in Eq. [sent-58, score-0.312]

32 With various Vaj , the measured DC characteristic (chip result) of the sigmoid function is shown in Fig. [sent-60, score-0.098]

33 5 shows the measured output of a noisy neuron (upper trace) with {si } sweeping between 1. [sent-98, score-0.266]

34 8V, and vni generated by LFSR (Linear Feedback Shift Register) [9] with an amplitude of 0. [sent-101, score-0.075]

35 The {si } and {wi } above forced the neuron’s output to sweep a sigmoid-shaped curve as Fig. [sent-103, score-0.03]

36 4b, while the input noise disturbed the curve to achieve continous-valued probabilistic output. [sent-104, score-0.049]

37 A neuron state Vsj was sampled periodically and held with negligible clock feedthrough whenever the switch opened(went low). [sent-105, score-0.141]

38 4 Minimising-Contrastive-Divergence learning on chip The MCD learning for the Product of Experts[3] has been successfully implemented and reported in [10]. [sent-106, score-0.112]

39 The MCD learning for CRBM is therefore implemented simply by replacing the following two circuits. [sent-107, score-0.035]

40 1 is substituted for the two-quadrant multiplier in [10] to enhance learning ﬂexibility; secondly, a pulse-coded learning circuit, rather than the analogue weightchanging circuit in [10], is employed to allow not only accurate learning steps but also refresh of dynamically-held parameters. [sent-110, score-0.439]

41 6 shows the block diagram of the VLSI implementation of the MCD learning rules for the noisy neurons, along with the digital control signals. [sent-113, score-0.199]

42 In learning mode (LER/REF=1), the initial states si and sj are ﬁrst sampled by clock signals CKsi and CKsj , resulting in a current I+ at the output of four-quadrant multiplier. [sent-114, score-0.533]

43 After CK+ samples and holds I+ , the one-step reconstructed states si and sj are ˆ ˆ sampled by CKsip and CKsjp to produce another current I− . [sent-115, score-0.435]

44 CKq then samples and holds the output of the current subtracter Isub , which represents the diﬀerence between initial data and one-step Gibbs sampled data. [sent-116, score-0.096]

45 Repeating the above clocking sequence for four cycles, four Isub are accumulated and averaged to derive Iave , representing si sj 4 − si sj 4 in equation(5). [sent-117, score-0.814]

46 Finally, Iave is compared to a reference ˆˆ current to determine the learning direction DIR, and the learning circuit, triggered by CKup , updates the parameter once. [sent-118, score-0.118]

47 The dash-lined box represents the voltagelimiting circuit used only for parameter {aj }, whose voltage range should be limited to ensure normal operation of the voltage-controlled active resistor in Fig. [sent-119, score-0.373]

48 In refresh mode (LER/REF=1), the signal REFR rather than DIR determines the updating direction, maintaining the weight to a reference value. [sent-121, score-0.119]

49 (5)(6) (b)The digital control signals The subtracter, accumulator and current comparator in Fig. [sent-123, score-0.034]

50 The following subsections therefore focus on the pulse-coded learning circuit and the measurement results of on-chip MCD learning. [sent-125, score-0.224]

51 2 The pulse-coded learning circuit The pulse-coded learning circuit consists of a pulse generator (Fig. [sent-127, score-0.619]

52 The stepsize of the learning cell is adjustable through VP and VN in Fig. [sent-130, score-0.137]

53 However, transistor nonlinearities and process variations do not allow diﬀerent and accurate learning rates to be set for various parameters in the same chip ({aj } and {wij } in our case). [sent-132, score-0.119]

54 We therefore apply a width-variable pulse to the enabling input (EN) of the learning cell, controlling the learning step precisely by monitoring the pulse width oﬀ-chip. [sent-133, score-0.312]

55 As the input capacitance of each learning cell is less than 0. [sent-134, score-0.107]

56 1pF, one pulse generator can control all the learning cells with the same learning rate. [sent-135, score-0.241]

57 2 implies that only three pulse generators are required for ηw , ηav , and ηah . [sent-137, score-0.121]

58 The pulse generator is therefore a simple way to achieve accurate control. [sent-138, score-0.171]

59 The pulse generator is largely a D-type ﬂip-ﬂop whose output Vpulse is initially reset to low via reset. [sent-139, score-0.237]

60 Eventually, Vpulse is reset to zero as soon as Vd is discharged. [sent-141, score-0.036]

61 During the positive pulse, the learning cell charges or discharges the voltage stored on Cw [12], according to the directional input INC/DEC. [sent-142, score-0.216]

62 Varying Vmu controls the pulse width accurately from 10ns (Vη = 2. [sent-143, score-0.121]

63 9V ), amounting to learning stepsize from 1mV to 500mV as VN = 0. [sent-145, score-0.065]

64 (6) indicates that {aj } can be adapted with the same learning circuit simply by substituting sj and sj for si and si in Fig. [sent-150, score-1.038]

65 6, the voltage Vaj should ˆ ˆ be conﬁned in [1,3]V, to ensure normal operation of the voltage-controlled active resistor in Fig. [sent-151, score-0.184]

66 8 is thus designed to limit the range of Vaj , deﬁned by Vmax and Vmin through two voltage comparators. [sent-154, score-0.109]

67 4 On-chip learning Two MCD learning circuits, one for {wij } and the other for {aj }, have been fabricated successfully. [sent-160, score-0.117]

68 9 shows the measured on-chip learning of both parameters with (a) diﬀerent learning rates (b) diﬀerent learning directions. [sent-162, score-0.135]

69 With the reference zero being deﬁned at (a) (b) Figure 9: Measurement of parameter aj and wij learning in (a)diﬀerent learning rates (b)diﬀerent directions 2. [sent-168, score-0.432]

70 As controlled by diﬀerent pulse widths (PULSE1 and PULSE2), the two parameters were updated with diﬀerent stepsizes (10mV and 34mV) but in the same direction. [sent-177, score-0.121]

71 The trace of parameter aj shows digital noise attributable to sub-optimal layout, and has been improved in a subsequent design. [sent-178, score-0.315]

72 Therefore, the learning circuit forces aj to decrease toward Vmax , while wij remains learning up and down as Fig. [sent-182, score-0.573]

73 5 Conclusion Fabricated CMOS circuits have been presented and the implemention of noisy neural computation that underlies the CRBM has been demonstrated. [sent-184, score-0.199]

74 The promising measured results show that the CRBM is, as has been inferred in the past[1], amenable to mixed-mode VLSI. [sent-185, score-0.03]

75 A full CRBM system with two visible and four hidden neurons has thus been implemented to examine this concept. [sent-187, score-0.138]

76 The neurons in the proof-of-concept CRBM system are hard-wired to each other and the multi-channel uncorrelated noise sources implemented by the LFSR [9]. [sent-188, score-0.146]

77 A scalable design will thus be an essential next step before pratical biomedical applications. [sent-189, score-0.062]

78 Furthermore, the CRBM system may open the possibility of utilising VLSI intrinsic noise for computation in the deep-sub-miron era. [sent-190, score-0.049]

79 Murray, “A continuous restricted boltzmann machine with an implementable training algorithm,” IEE Proc. [sent-193, score-0.05]

80 Hinton, “Training products of experts by minimizing contrastive divergence,” Neural Computation, vol. [sent-206, score-0.055]

81 Chible, “Analog circuit for synapse neural networks vlsi implementation,” The 7th IEEE Int. [sent-222, score-0.314]

82 Tsividis, “Floating voltage-controlled resistors in cmos technology,” Electronics Letters, vol. [sent-229, score-0.044]

83 Vittoz, “Mos transistors operated in the lateral bipolar mode and their application in cmos technology,” IEEE Journal of Solid-State Circuits, vol. [sent-233, score-0.077]

84 Chu, “A vlsi-eﬃcient technique for generating multiple uncorrelated noise sources and its application to stochastic neural networks,” IEEE Trans. [sent-244, score-0.049]

85 Murray, “Mixed-signal vlsi implementation of the product of experts’ minimizing contrastive divergence learning scheme,” in IEEE Proc. [sent-251, score-0.246]

86 Cauwenberghs, “An analog vlsi recurrent neural network,” IEEE Tran. [sent-264, score-0.125]

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tfidf for this paper:

wordName wordTfidf (topN-words)

[('vaj', 0.395), ('crbm', 0.338), ('vsi', 0.282), ('sj', 0.244), ('mcd', 0.207), ('aj', 0.198), ('circuit', 0.189), ('vsr', 0.188), ('si', 0.163), ('vlsi', 0.125), ('vw', 0.125), ('pulse', 0.121), ('vmax', 0.119), ('wij', 0.116), ('dir', 0.114), ('neuron', 0.113), ('voltage', 0.109), ('multiplier', 0.107), ('circuits', 0.106), ('ck', 0.106), ('neurons', 0.097), ('io', 0.094), ('vmin', 0.094), ('noisy', 0.093), ('murray', 0.082), ('di', 0.076), ('isum', 0.075), ('resistor', 0.075), ('vni', 0.075), ('vpulse', 0.075), ('cell', 0.072), ('erential', 0.069), ('sigmoid', 0.068), ('biomedical', 0.062), ('chible', 0.056), ('ckup', 0.056), ('iave', 0.056), ('isub', 0.056), ('vcomp', 0.056), ('vmu', 0.056), ('vsj', 0.056), ('wr', 0.056), ('cw', 0.055), ('contrastive', 0.055), ('erent', 0.052), ('wi', 0.052), ('generator', 0.05), ('boltzmann', 0.05), ('noise', 0.049), ('iout', 0.049), ('vd', 0.049), ('reference', 0.048), ('fabricated', 0.047), ('nonlinearity', 0.046), ('cmos', 0.044), ('chip', 0.042), ('electronics', 0.042), ('transistor', 0.042), ('dd', 0.042), ('vp', 0.042), ('visible', 0.041), ('amps', 0.038), ('ckq', 0.038), ('cksi', 0.038), ('cksip', 0.038), ('cksj', 0.038), ('cksjp', 0.038), ('converter', 0.038), ('fleury', 0.038), ('lerref', 0.038), ('lfsr', 0.038), ('mnb', 0.038), ('refr', 0.038), ('refresh', 0.038), ('refreshed', 0.038), ('subtracter', 0.038), ('vnr', 0.038), ('vo', 0.038), ('volts', 0.038), ('vsigma', 0.038), ('chen', 0.037), ('diagram', 0.037), ('reset', 0.036), ('learning', 0.035), ('rl', 0.034), ('dc', 0.034), ('digital', 0.034), ('trace', 0.034), ('mode', 0.033), ('vn', 0.033), ('mna', 0.033), ('vittoz', 0.033), ('drifting', 0.033), ('vx', 0.033), ('divergence', 0.031), ('output', 0.03), ('measured', 0.03), ('mos', 0.03), ('stepsize', 0.03), ('sampled', 0.028)]

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